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A clustered yield model for SMT boards and MCM's

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dc.contributor.authorChen, Tom W., author
dc.contributor.authorTegethoff, Mick M. V., author
dc.contributor.authorIEEE, publisher
dc.date.accessioned2007-01-03T06:15:58Z
dc.date.available2007-01-03T06:15:58Z
dc.date.issued1995
dc.description.abstractThis paper describes a clustered yield model for complex surface mount technology (SMT) assemblies and multichip modules (MCM's). Based on yield modeling techniques that have been proven in the manufacturing of integrated circuits (IC's), this model uses the negative binomial distribution of defects to calculate board yield after test. Manufacturing data validates that this model accurately predicts the clustering of defects and the yield predictions are significantly better than traditional binomial models.
dc.format.mediumborn digital
dc.format.mediumarticles
dc.identifier.bibliographicCitationTegethoff, Mick M. V. and Tom W. Chen, A Clustered Yield Model for SMT Boards and MCM's, IEEE Transactions on Components, Packaging, and Manufacturing Technology. Part B, Advanced Packaging 18, no. 4 (November 1995): 640-643.
dc.identifier.urihttp://hdl.handle.net/10217/1205
dc.languageEnglish
dc.language.isoeng
dc.publisherColorado State University. Libraries
dc.relation.ispartofFaculty Publications
dc.rights©1995 IEEE.
dc.rightsCopyright and other restrictions may apply. User is responsible for compliance with all applicable laws. For information about copyright law, please see https://libguides.colostate.edu/copyright.
dc.subjectMCM
dc.subjectSMT
dc.subjectyields
dc.subjectboard
dc.subjectclustered
dc.titleA clustered yield model for SMT boards and MCM's
dc.typeText

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