A clustered yield model for SMT boards and MCM's

Abstract

This paper describes a clustered yield model for complex surface mount technology (SMT) assemblies and multichip modules (MCM's). Based on yield modeling techniques that have been proven in the manufacturing of integrated circuits (IC's), this model uses the negative binomial distribution of defects to calculate board yield after test. Manufacturing data validates that this model accurately predicts the clustering of defects and the yield predictions are significantly better than traditional binomial models.