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Parallel and pipeline architectures for 2-D block processing

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dc.contributor.authorAzimi-Sadjadi, Mahmood R., author
dc.contributor.authorRostampour, A. R., author
dc.contributor.authorIEEE, publisher
dc.date.accessioned2007-01-03T04:18:36Z
dc.date.available2007-01-03T04:18:36Z
dc.date.issued1989
dc.description.abstractThis paper is concerned with the development and design of parallel and pipeline architectures for 2-D recursive and nonrecursive block digital filter. In this regard, several high speed structures using single-instruction multiple-data stream (SIMD) machines have been developed. These structures are designed based upon the specific nature of the block convolution processor, block recursive processor and block state-space processor both at the block and scalar levels.
dc.format.mediumborn digital
dc.format.mediumarticles
dc.identifier.bibliographicCitationAzimi-Sadjadi, M. R. and A. R. Rostampour, Parallel and Pipeline Architectures for 2-D Block Processing, IEEE Transactions on Circuits and Systems 36, no. 3 (March 1989): 443-448.
dc.identifier.urihttp://hdl.handle.net/10217/1016
dc.languageEnglish
dc.language.isoeng
dc.publisherColorado State University. Libraries
dc.relation.ispartofFaculty Publications
dc.rights©1989 IEEE.
dc.rightsCopyright and other restrictions may apply. User is responsible for compliance with all applicable laws. For information about copyright law, please see https://libguides.colostate.edu/copyright.
dc.subjectparallel architectures
dc.subjecttwo-dimensional digital filters
dc.titleParallel and pipeline architectures for 2-D block processing
dc.typeText

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