Performance assessment of multi-walled carbon nanotube interconnects using advanced polynomial chaos schemes
| dc.contributor.author | Bhatnagar, Sakshi, author | |
| dc.contributor.author | Nikdast, Mahdi, advisor | |
| dc.contributor.author | Pezeshki, Ali, committee member | |
| dc.contributor.author | Estep, Donald, committee member | |
| dc.date.accessioned | 2019-06-14T17:06:34Z | |
| dc.date.available | 2019-06-14T17:06:34Z | |
| dc.date.issued | 2019 | |
| dc.description.abstract | With the continuous miniaturization in the latest VLSI technologies, manufacturing uncertainties at nanoscale processes and operations are unpredictable at the chip level, packaging level and at board levels of integrated systems. To overcome such issues, simulation solvers to model forward propagation of uncertainties or variations in random processes at the device level to the network response are required. Polynomial Chaos Expansion (PCE) of the random variables is the most common technique to model the unpredictability in the systems. Existing methods for uncertainty quantification have a major drawback that as the number of random variables in a system increases, its computational cost and time increases in a polynomial fashion. In order to alleviate the poor scalability of standard PC approaches, predictor-corrector polynomial chaos scheme and hyperbolic polynomial chaos expansion (HPCE) scheme are being proposed in this dissertation. In the predictor-corrector polynomial scheme, low-fidelity meta-model is generated using Equivalent Single Conductor (ESC) approximation model and then its accuracy is enhanced using low order multi-conductor circuit (MCC) model called a corrector model. In HPCE, sparser polynomial expansion is generated based on the hyperbolic criterion. These schemes result in an immense reduction in CPU cost and speed. This dissertation presents the novel approach to quantify the uncertainties in multi-walled carbon nano-tubes using these schemes. The accuracy and validation of these schemes are shown using various numerical examples. | |
| dc.format.medium | born digital | |
| dc.format.medium | masters theses | |
| dc.identifier | Bhatnagar_colostate_0053N_15405.pdf | |
| dc.identifier.uri | https://hdl.handle.net/10217/195363 | |
| dc.language | English | |
| dc.language.iso | eng | |
| dc.publisher | Colorado State University. Libraries | |
| dc.relation.ispartof | 2000-2019 | |
| dc.rights | Copyright and other restrictions may apply. User is responsible for compliance with all applicable laws. For information about copyright law, please see https://libguides.colostate.edu/copyright. | |
| dc.title | Performance assessment of multi-walled carbon nanotube interconnects using advanced polynomial chaos schemes | |
| dc.type | Text | |
| dcterms.rights.dpla | This Item is protected by copyright and/or related rights (https://rightsstatements.org/vocab/InC/1.0/). You are free to use this Item in any way that is permitted by the copyright and related rights legislation that applies to your use. For other uses you need to obtain permission from the rights-holder(s). | |
| thesis.degree.discipline | Electrical and Computer Engineering | |
| thesis.degree.grantor | Colorado State University | |
| thesis.degree.level | Masters | |
| thesis.degree.name | Master of Science (M.S.) |
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