A parallel algorithm and architecture for the control of kinematically redundant manipulators

Reagin, J. Michael, author
Maciejewski, Anthony A., author
IEEE, publisher
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Kinematically redundant manipulators are inherently capable of more dexterous manipulation due to their additional degrees of freedom. To achieve this dexterity, however, one must be able to efficiently calculate the most desirable configuration from the infinite number of possible configurations that satisfy the end-effector constraint. It has been previously shown that the singular value decomposition (SVD) plays a crucial role in doing such calculations. In this work, a parallel algorithm for calculating the SVD is incorporated into a computational scheme for solving the equations of motion for kinematically redundant systems. This algorithm, which generalizes the damped least squares formulation to include solutions that utilize null-space projections and task prioritization as well as augmented or extended Jacobians, is then implemented on a simple linear array of processing elements. By taking advantage of the error bounds on the perturbation of the SVD, it is shown that an array of only four AT&T DSP chips can result in control cycle times of less than 3 ms for a seven degree-of-freedom manipulator.
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parallel algorithms
digital signal processing chips
parallel architectures
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