Optimization of the front contact to minimize short-circuit current losses in CdTe thin-film solar cells

Abstract

With a growing population and rising standard of living, the world is in need of clean sources of energy at low cost in order to meet both economic and environmental needs. Solar energy is an abundant resource which is fundamentally adequate to meet all human energy needs. Photovoltaics are an attractive way to safely convert this energy to electricity with little to no noise, moving parts, water, or arable land. Currently, thin-film photovoltaic modules based on cadmium telluride are a low-cost solution with multiple GW/year commercial production, but have lower conversion efficiency than the dominant technology, crystalline silicon. Increasing the conversion efficiency of these panels through optimization of the electronic and optical structure of the cell can further lower the cost of these modules. The front contact of the CdTe thin-film solar cell is critical to device efficiency for three important reasons: it must transmit light to the CdTe absorber to be collected, it must form a reasonably passive interface and serve as a growth template for the CdTe, and it must allow electrons to be extracted from the CdTe. The current standard window layer material, cadmium sulfide, has a low bandgap of 2.4 eV which can block over 20% of available light from being converted to mobile charge carriers. Reducing the thickness of this layer or replacing it with a higher-bandgap material can provide a commensurate increase in device efficiency. When the CdS window is made thinner, a degradation in electronic quality of the device is observed with a reduction in open-circuit voltage and fill factor. One commonly used method to enable a thinner optimum CdS thickness is a high-resistance transparent (HRT) layer between the transparent conducting oxide electrode and window layer. The function of this layer has not been fully explained in the literature, and existing hypotheses center on the existence of pinholes in the window layer which are not consistent with observed results. In this work numerous HRT layers were examined beginning with an empirical optimization to create a SnO₂-based HRT which allows significantly reduced CdS thickness while maintaining diode quality. The role of this layer was explored through measurement of band alignment parameters via photoemission. These results suggest a negative correlation of work function to device open-circuit voltage, which implies that non-ideal band alignment at the front interface of CdTe is in large part responsible for the loss of electronic quality. Several scenarios explored through 1-dimensional modeling in the SCAPS program corroborate this theory. A sputter-deposited (Mg,Zn)O layer was tested which allows for complete elimination of the CdS window layer with an increase in open-circuit voltage and near complete transmission of all above-bandgap light. An additional window layer material--sputtered, oxygenated CdS--was explored for its transparency. This material was found only to produce high efficiency devices with an effective buffer layer such as the optimized SnO₂-base HRT. The dependence of chemical, optical, electrical, and device properties on oxygen content was explored, and the stability of these devices was determined to depend largely on the minimization of copper in the device. Both sputter-deposited alloy window layers appeared to have tunable electron affinity which was critical to optimizing band alignment and therefore device efficiency. Several scenarios explored through 1-dimensional modeling in the SCAPS program corroborate this theory. Both window layers allowed an AM1.5G efficiency increase from a baseline of approximately 13% to 16%.