Browsing by Author "Jayasumana, Anura, committee member"
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Item Open Access A semi-dynamic resource management framework for multicore embedded systems with energy harvesting(Colorado State University. Libraries, 2015) Xiang, Yi, author; Pasricha, Sudeep, advisor; Jayasumana, Anura, committee member; Siegel, H. J., committee member; Strout, Michelle Mills, committee memberSemiconductor technology has been evolving rapidly over the past several decades, introducing a new breed of embedded systems that are tiny, efficient, and pervasive. These embedded systems are the backbone of the ubiquitous and pervasive computing revolution, embedded intelligence all around us. Often, such embedded intelligence for pervasive computing must be deployed at remote locations, for purposes of environment sensing, data processing, information transmission, etc. Compared to current mobile devices, which are mostly supported by rechargeable and exchangeable batteries, emerging embedded systems for pervasive computing favor a self-sustainable energy supply, as their remote and mass deployment makes it impractical to change or charge their batteries. The ability to sustain systems by scavenging energy from ambient sources is called energy harvesting, which is gaining monument for its potential to enable energy autonomy in the era of pervasive computing. Among various energy harvesting techniques, solar energy harvesting has attracted the most attention due to its high power density and availability. Another impact of semiconductor technology scaling into the deep submicron level is the shifting of design focus from performance to energy efficiency as power dissipation on a chip cannot increase indefinitely. Due to unacceptable power consumption at high clock rate, it is desirable for computing systems to distribute workload on multiple cores with reduced execution frequencies so that overall system energy efficiency improves while meeting performance goals. Thus it is necessary to adopt the design paradigm of multiprocessing for low-power embedded systems due to the ever-increasing demands for application performance and stringent limitations on power dissipation. In this dissertation we focus on the problem of resource management for multicore embedded systems powered by solar energy harvesting. We have conducted a substantial amount of research on this topic, which has led to the design of a semi-dynamic resource management framework designed with emphasis on efficiency and flexibility that can be applied to energy harvesting-powered systems with a variety of functionality, performance, energy, and reliability goals. The capability and flexibility of the proposed semi-dynamic framework are verified by issues we have addressed with it, including: (i) minimizing miss rate/miss penalty of systems with energy harvesting, (ii) run-time thermal control, (iii) coping with process variation induced core-to-core heterogeneity, (iv) management of hybrid energy storage, (v) scheduling of task graphs with inter-node dependencies, (vi) addressing soft errors during execution, (vii) mitigating aging effects across the chip over time, and (vii) supporting mixed-criticality scheduling on heterogeneous processors.Item Open Access An integrated variation-aware mapping framework for FinFET based irregular 2D MPSoCs in the dark silicon era(Colorado State University. Libraries, 2016) Rajkrishna, Pramit, author; Pasricha, Sudeep, advisor; Jayasumana, Anura, committee member; Burns, Patrick, committee memberIn the deep submicron era, process variations and dark silicon considerations have become prominent focus areas for early stage networks-on-chip (NoC) design synthesis. Additionally, FinFETs have been implemented as promising alternatives to bulk CMOS implementations for 22nm and below technology nodes to mitigate leakage power. While overall system power in a dark silicon paradigm is governed by a limitation on active cores and inter-core communication patterns, it has also become imperative to consider process variations in a holistic context for irregular 2D NoCs. Additionally, manufacturing defects induce link failures, with resultant irregularity in the NoC topology and rendering conventional minimal routing schemes for regular topologies inoperable. In this thesis, we propose a holistic process variation aware design time synthesis framework (HERMES) that performs computation and communication mapping while minimizing energy consumption and maximizing Power Performance Yield (PPY). The framework targets a 22nm FinFET based homogenous NoC implementation with design time link failures in the NoC fabric, a dark silicon based power constraint and system bandwidth constraints for performance guarantees, while preserving connectivity and deadlock freedom in the NoC fabric. Our experimental results show that HERMES performs 1.32x better in energy, 1.29x better in simulation execution time and 58.44% better in PPY statistics, over other state-of-the-art proposed mapping techniques for various SPLASH2 and PARSEC parallel benchmarks.Item Open Access Attenuation correction of X-band polarimetric Doppler weather radar signals: application to systems with high spatio-temporal resolution(Colorado State University. Libraries, 2015) Gálvez, Miguel Bustamante, author; Bringi, V. N., advisor; Colom-Ustariz, Jose G., advisor; Jayasumana, Anura, committee member; Pezeshki, Ali, committee member; Mielke, Paul W., committee memberIn the last decade the atmospheric science community has seen widespread and successful application of X-band dual-polarization weather radars for measuring precipitation in the lowest 2 km of the troposphere. These X-band radars have the advantage of a smaller footprint, lower cost, and improved detection of hydrometeors due to increased range resolution. In recent years, the hydrology community began incorporating these radars in novel applications to study the spatio-temporal variability of rainfall from precipitation measurements near the ground, over watersheds of interest. The University of Iowa mobile XPOL radar system is one of the first to be used as an X-band polarimetric radar network dedicated to hydrology studies. During the spring of 2013, the Iowa XPOL radars participated in NASA Global Precipitation Measurement's (GPM) first field campaign focused solely on hydrology studies, called the Iowa Flood Studies (IFloodS). Weather radars operating in the 3.2 cm (X-band) regime can suffer from severe attenuation, particularly in heavy convective storms. This has led to the development of sophisticated algorithms for X-band radars to correct the meteorological observables for attenuation. This is especially important for higher range resolution hydrology-specific X-band weather radars, where the attenuation correction aspect remains relatively unexamined. This research studies the problem of correcting for precipitation-induced attenuation in X-band polarimetric weather radars with high spatio-temporal resolution for hydrological applications. We also examine the variability in scattering simulations obtained from the drop spectra measured by two dimensional video disdrometers (2DVD) located in different climatic and geographical locations. The 2DVD simulations provide a ground truth for various relations (e.g., AH-KDP and AH-ADP) applied to our algorithms for estimating attenuation, and ultimately correcting for it to provide improved rain rates and hydrometeor identification. We developed a modified ZPHI attenuation correction algorithm, with a differential phase constraint, and tuned it for the high resolution IFloodS data obtained by the Iowa XPOL radars. Although this algorithm has good performance in pure rain events, it is difficult to fully correct for attenuation and differential attenuation near the melting layer where a mixed phase of rain and melting snow or graupel exists. To identify these regions, we propose an improved iterative FIR range filtering technique, as first presented by Hubbert and Bringi (1995), to better estimate the differential backscatter phase, δ, due to Mie scattering at X-band from mixed phase precipitation. In addition, we investigate dual-wavelength algorithms to directly estimate the α and β coefficients, of the AH = αKDP and ADP = βKDP relations, to obtain the path integrated attenuation due to rain and wet ice or snow in the region near the melting layer. We use data from the dual-wavelength, dual-polarization CSU-CHILL S-/X-band Doppler weather radar for analyzing the coefficients and compare their variability as a function of height, where the hydrometeors are expected to go through a microphysical transformation as they fall, starting as snow or graupel/hail then melting into rain or a rain-hail mixture. The S-band signal is un-attenuated and so forms a reference for estimating the X-band attenuation and differential attenuation. We present the ranges of the α and β coefficients in these varying precipitation regimes to help improve KDP-based attenuation correction algorithms at X-band as well as rain rate algorithms based on the derived AH.Item Embargo Coexistence of weather radars and communication systems: model to identify interfering sources and mitigation solutions(Colorado State University. Libraries, 2023) Vaccarono, Mattia, author; Chandrasekaran, Chandra V., advisor; Cheney, Margaret, committee member; Jayasumana, Anura, committee member; Popat, Ketul, committee memberElectromagnetic spectrum is a finite resource. Weather radars are one of the many sources which use electromagnetic waves. The availability of spectrum bands that can be assigned to a specific user is limited. Consequently, the electromagnetic spectrum is shared by different application in the same frequency band. This is the specific case of C-band weather radars, which operate in the 5.6GHz band, sharing the same frequencies with Radio Local Area Networks, Wireless Local Area Networks and HiperLAN systems. These telecommunication systems are continuously increasing in rural areas as broadband Internet access points. The coexistence of C-band weather radar and such systems is nowadays a primary topic in the weather radar community. The amount of interference received by weather radars are affecting the data quality, especially for polarimetric observations. Electromagnetic interference may also appear at higher frequencies, such as the X-band located around 9.3GHz. These frequencies are used by weather radars for hydrological purposes. The dense radar network deployed in Dallas Fort Worth area and the mobile radar managed by Arpa Piemonte operate at X-band and they receive interfering signals. These signals have been detected during a field measurement campaign using both the mobile weather radar and a vector signal analyzer able to perform real time analysis. A technique to identify the likely interfering sources is discussed, which can be used by the National Regulatory Authorities or Regional Agencies, such as the Physics and Industrial Risk Department of Arpa Piemonte, Italy, in charge of the telecommunication authorization processes. The model may be applied to a telecommunication tower transmitting at the same frequency of a given radar and in case of likely interference, mitigation strategies could be set during the tower installation, i.e. changing the antenna direction or tilt. Over the years, many RFI removal and mitigation tools have been discussed in the literature, but only few are currently implemented on operational weather radars. This work, instead, aims to implement mitigation solutions that can be implemented by National Weather Services. The electromagnetic interference may be removed at different levels: from the received signals to the processed radar products, such as reflectivity maps that are shown to general public. In order to make possible the interference removal also to those National Weather Services, or radar management services, which are not able to act on the radar signal processor to implement deeper mitigation tools, a RFI mitigation solution based on image processing is shown. This method does not require to access the radar signal processor, but it does not mitigate the effect of interference overlapped with weather echoes. Then, based on the interfering signals features, a mitigation solution has been developed. The interfering signals are removed before received signals are processed to obtain radar moments. The proposed method has been tested with good performances in clear air echoes at both C and X-bands. A study case has been selected to evaluate its performances during precipitation events. The proposed mitigation solution is applied to the received signals to remove interfering signals and to reconstruct the residual information. The radar reflectivity is computed and it is compared to the operational radar Z product. A Swiss C-band radar is selected as reference to validate the mitigation solution. The interfering signals are properly removed and the missing data in the received radar pulses are computed by smoothing from adjacent range gates and pulses. Actually, removing only the interfering signals the proposed solution is able to preserve the meteorological echoes which lead to a better estimate of the reflectivity values, especially in case of weak echoes (i.e. light rain or drizzle). The Interference to Signal Ratio (ISR) is considered the metric to quantitatively evaluate the mitigation performance as ISR difference between processed and received signals. The proposed mitigation solution can achieve up to 20dB suppression.Item Open Access Design and optimization of emerging interconnection and memory subsystems for future manycore architectures(Colorado State University. Libraries, 2018) Thakkar, Ishan G., author; Pasricha, Sudeep, advisor; Bohm, Wim, committee member; Jayasumana, Anura, committee member; Lear, Kevin, committee memberWith ever-increasing core count and growing performance demand of modern data-centric applications (e.g., big data and internet-of-things (IoT) applications), energy-efficient and low-latency memory accesses and data communications (on and off the chip) are becoming essential for emerging manycore computing systems. But unfortunately, due to their poor scalability, the state-of-the-art electrical interconnects and DRAM based main memories are projected to exacerbate the latency and energy costs of memory accesses and data communications. Recent advances in silicon photonics, 3D stacking, and non-volatile memory technologies have enabled the use of cutting-edge interconnection and memory subsystems, such as photonic interconnects, 3D-stacked DRAM, and phase change memory. These innovations have the potential to enhance the performance and energy-efficiency of future manycore systems. However, despite the benefits in performance and energy-efficiency, these emerging interconnection and memory subsystems still face many technology-specific challenges along with process, environment, and workload variabilities, which negatively impact their reliability overheads and implementation feasibility. For instance, with recent advances in silicon photonics, photonic networks-on-chip (PNoCs) and core-to-memory photonic interfaces have emerged as scalable communication fabrics to enable high-bandwidth, energy-efficient, and low-latency data communications in emerging manycore systems. However, these interconnection subsystems still face many challenges due to thermal and process variations, crosstalk noise, aging, data-snooping Hardware Trojans (HTs), and high overheads of laser power generation, coupling, and distribution, all of which negatively impact reliability, security, and energy-efficiency. Along the same lines, with the advent of through-silicon via (TSV) technology, 3D-stacked DRAM architectures have emerged as small-footprint main memory solutions with relatively low per-access latency and energy costs. However, the full potential of the 3D-stacked DRAM technology remains untapped due to thermal- and scaling-induced data instability, high leakage, and high refresh rate problems along with other challenges related to 3D floorplanning and power integrity. Recent advances have also enabled Phase Change Memory (PCM) as a leading technology that can alleviate the leakage and scalability shortcomings of DRAM. But asymmetric write latency and low endurance of PCM are major challenges for its widespread adoption as main memory in future manycore systems. My research has contributed several solutions that overcome multitude of these challenges and improve the performance, energy-efficiency, security, and reliability of manycore systems integrating photonic interconnects and emerging memory (3D-stacked DRAM and phase change memory) subsystems. The main contribution of my thesis is a framework for the design and optimization of emerging interconnection and memory subsystems for future manycore computing systems. The proposed framework synergistically integrates layer-specific enhancements towards the design and optimization of emerging main memory, PNoC, and inter-chip photonic interface subsystems. In addition to subsystem-specific enhancements, we also combine enhancements across subsystems to more aggressively improve the performance, energy-efficiency, and reliability for future manycore architectures.Item Open Access Design-time and run-time frameworks for multi-objective optimization of 2D and 3D NoC-based multicore computing systems(Colorado State University. Libraries, 2016) Kapadia, Nishit, author; Kapadia, Sudeep, advisor; Jayasumana, Anura, committee member; Strout, Michelle, committee member; Siegel, H. J., committee memberAs a result of semiconductor technology scaling persisting over the last five decades, chip designers are today faced with the task of managing over a billion on-chip transistors. With feature sizes of no more than a few tens of nanometers in contemporary technologies, several undesirable phenomena at such nanoscale geometries have significantly complicated System-on-Chip (SoC) design. These phenomena include: (i) an increased influence of process variations that has introduced considerable unpredictability in circuit-behavior; (ii) a lowering of the critical charge of logic- and memory-cells that has given rise to elevated levels of soft-errors; (iii) a steep rise in power-densities due to higher transistor-densities, that has introduced the problem of dark-silicon, where a significant portion of the chip is required to be shut down at any given time; (iv) circuit aging that has increased significantly because of higher severity of aging factors such as electromigration and bias temperature instability (BTI) in circuits fabricated in advanced technology nodes; and (v) high voltage drops in the power delivery network (PDN) that have worsened due to the shrinking widths of on-chip interconnects. Additionally, even though the design complexity has risen exponentially, the time-to-market window for design companies has not changed markedly. Despite the numerous daunting challenges faced by the semiconductor design community, each new generation of SoCs are expected to meet higher and higher performance demands. Therefore, there is an urgent need for holistic automated system-level design tools that produce feasible and optimized design solutions efficiently while satisfying application and platform constraints. As a lot more transistors become available to designers with every new technology node, we are witnessing a trend of increasing number of processing cores on the semiconductor die. With tens to hundreds of cores being integrated on emerging multicore SoCs, network-on-chip (NoC) based communication architectures have been found to be more suitable compared to the traditional bus-based communication architectures. Also, the recently evolved paradigm of 3D stacking of ICs has opened up new avenues for extracting higher performance from future systems by stacking multiple layers of cores and memory. In this thesis, we propose design-time optimization frameworks for synthesis of 2D and 3D NoC-based multicore SoCs. We present novel algorithms and heuristics for application-mapping, voltage-island partitioning, and NoC routing path allocation to optimize metrics such as communication and computation power and energy, chip-cooling power, voltage-drops in the PDN, design-yield, and energy-delay-squared product (ED2P), while satisfying temperature, PDN, and performance constraints. In addition, to address the critical need for system-level solutions that can simultaneously and adaptively manage the constraints imposed by dark silicon, process variations, soft-error reliability, and lifetime reliability, we propose run-time frameworks for OS-level adaptations based on the circuit-level characteristics of multicore SoCs. Experimental results show that the techniques proposed in this thesis produce design solutions that provide much better overall optimality while considering multiple optimization metrics pertinent to modern semiconductor design.Item Open Access Enhancing the test and evaluation process: implementing agile development, test automation, and model-based systems engineering concepts(Colorado State University. Libraries, 2020) Walker, Joshua T., author; Borky, John, advisor; Bradley, Thomas, advisor; Chong, Edwin, committee member; Ghosh, Sudipto, committee member; Jayasumana, Anura, committee memberWith the growing complexity of modern systems, traditional testing methods are falling short. Test documentation suites used to verify the software for these types of large, complex systems can become bloated and unclear, leading to extremely long execution times and confusing, unmanageable test procedures. Additionally, the complexity of these systems can prevent the rapid understanding of complicated system concepts and behaviors, which is a necessary part of keeping up with the demands of modern testing efforts. Opportunities for optimization and innovation exist within the Test and Evaluation (T&E) domain, evidenced by the emergence of automated testing frameworks and iterative testing methodologies. Further opportunities lie with the directed expansion and application of related concepts such as Model-Based Systems Engineering (MBSE). This dissertation documents the development and implementation of three methods of enhancing the T&E field when applied to a real-world project. First, the development methodology of the system was transitioned from Waterfall to Agile, providing a more responsive approach when creating new features. Second, the Test Automation Framework (TAF) was developed, enabling the automatic execution of test procedures. Third, a method of test documentation using the Systems Modeling Language (SysML) was created, adopting concepts from MBSE to standardize the planning and analysis of test procedures. This dissertation provides the results of applying the three concepts to the development process of an airborne Electronic Warfare Management System (EWMS), which interfaces with onboard and offboard aircraft systems to receive and process the threat environment, providing the pilot or crew with a response solution for the protection of the aircraft. This system is representative of a traditional, long-term aerospace project that has been constantly upgraded over its lifetime. Over a two-year period, this new process produced a number of qualitative and quantitative results, including improving the quality and organization of the test documentation suite, reducing the minimum time to execute the test procedures, enabling the earlier identification of defects, and increasing the overall quality of the system under test. The application of these concepts generated many lessons learned, which are also provided. Transitioning a project's development methodology, modernizing the test approach, and introducing a new system of test documentation may provide significant benefits to the development of a system, but these types of process changes must be weighed against the needs of the project. This dissertation provides details of the effort to improve the effectiveness of the T&E process on an example project, as a framework for possible implementation on similar systems.Item Open Access Heterogeneous prioritization for network-on-chip based multi-core systems(Colorado State University. Libraries, 2013) Pimpalkhute, Tejasi, author; Pasricha, Sudeep, advisor; Bohm, Wim, committee member; Jayasumana, Anura, committee memberIn chip multi-processor (CMP) systems, communication and memory access both play an important role in influencing the performance achievable by the system. The manner in which the network packets (on-chip cache requests/responses) and off-chip memory bound packets are handled, in multi-core environment with several applications executing in parallel, determines end-to-end latencies across the network and memory. Several techniques have been proposed in the past that schedule packets in either an application-aware manner or memory requests in a DRAM row/bank locality-aware manner. Prioritization of memory requests is a major factor in increasing the overall system throughput. Moreover, with the increasing diversity in CMP systems, applying the same prioritization rules to all packets traversing the NoC as is done in the current implementations may no longer be a viable approach. In this thesis, a holistic framework is proposed that integrates novel prioritization techniques for both network and memory accesses and operates cohesively in an application-aware and memory-aware manner to optimize overall system performance. The application-aware technique makes fine grain classification of applications with a newly proposed ranking scheme. Two novel memory-prioritization algorithms are also proposed, one of which is specifically tuned for high-speed memories. Upon analyzing the fairness issues that arise in a multi-core environment, a novel strategy is proposed and employed system-wide to ensure fairness in the system. The proposed heterogeneous prioritization framework is validated using a detailed cycle-accurate full system event-driven simulator and shows significant improvement over Round Robin and other recently proposed network and memory prioritization techniques.Item Open Access Microphysics and dynamics retrievals from dual-polarization radar for very short-term forecasting(Colorado State University. Libraries, 2016) Bechini, Renzo, author; Chandrasekar, V., advisor; Jayasumana, Anura, committee member; Mielke, Paul, committee member; Sun, Juanzhen, committee memberNowcasting is primarily a description of the near-future forecasted atmospheric state, relying heavily on observations. Besides routine meteorological observations (pressure, temperature, humidity, wind), dual-polarization weather radar provides a large amount of useful information due to the frequent-update (~5 min) and high-resolution (~500 m) three-dimensional sampling of the atmosphere. However, the atmospheric state variables are not readily invertible from radar remote observations, resulting in complexity in the numerical model data assimilation. This problem is normally dealt with by defining observation operators to simulate the radar variables from the model state vector. In this work the dual-polarization radar based retrievals are developed in order to demonstrate their potential for microphysics and dynamics retrievals. In particular the analysis of radar observations in convective storms and in stratiform ice clouds revealed that specific dual-polarization signatures can be successfully related to important dynamic properties such as vertical air motions, both in convective precipitation (strong updrafts, several m s-1) and in stratiform precipitation (large areas of weak updrafts, tenths of m s-1, associated with mid-tropospheric mesoscale forcing). Given the relevance of polarimetric signatures to dynamics retrievals, an improved hydrometeor classification method is developed based on a learn-from-data approach. In this technique, the traditional bin-based classification is replaced with a semi-supervised approach which combines cluster analysis, spatial contiguity, and statistical inference to assign the most likely class to a set of identified connected regions. The hydrometeor classification and relevant dual-polarization signatures establish a starting point to explore new means to improve the analysis of precipitation and near-surface winds, and their subsequent nowcasting. In particular the relevance of a well-known dual-polarization feature associated with deep convection (vertical columns of differential reflectivity) is illustrated by including the microphysics and dynamics-related information into a simple method for the analysis of surface winds. The goal of a physically consistent analysis is further pursued considering the Variational Doppler Radar Analysis System (VDRAS), an advanced four-dimensional data assimilation system based on a cloud-scale model, specifically designed for ingesting Doppler weather radar observations. The typical application using single-polarization observations from long-range S-band or C-band radars is here extended to high frequency (X-band), short range radars and dual-polarization observations. The combination of the hydrometeor classification and dual-polarization rainwater estimation allows to successfully assimilating the X-band observations, otherwise prone to relevant errors when using the reflectivity-based observation operator widely employed in numerical models. The feasibility of X-band data assimilation to contribute building a consistent analysis for nowcasting is demonstrated over the Dalls-Fort Worth test bed, where a dense network of dual-polarization X-band radars is being deployed. Eventually, a novel method for the nowcasting of precipitation and winds is built upon the VDRAS analysis, in an attempt to combine the robustness and consistency of data assimilation and the efficacy of extrapolation techniques for very short-term forecasting.Item Unknown Multi-frequency dual-polarized platform for validation of satellite precipitation measurements(Colorado State University. Libraries, 2017) Vega, Manuel A., author; Chandrasekar, V., advisor; Jayasumana, Anura, committee member; Cheney, Margaret, committee member; Mielke, Paul, committee memberSatellite missions such as the Tropical Rainfall Measuring Mission (TRMM) and the Global Precipitation Measurement (GPM) mission have demonstrated the value of rainfall measurements at a global scale. Both missions use a multi-frequency, active/passive (i.e. radar/radiometer) suite of instruments to achieve their measurement goals. Calibration and validation of these instruments has a vital role in the success of the mission since quantitative characterization of precipitation is the primary goal. Furthermore, these missions have also extended the understanding of the synergy between radar/radiometer observations within the atmospheric science community. From a ground validation (GV) perspective, active/passive observations are typically achieved with co-located, but independent instruments. In some cases, this has introduced radio frequency interference (RFI) between adjacent active/passive frequencies of operation, asynchronous scanning strategies and unmatched observation volumes. The work presented focuses on the following topics: 1) engineering aspects in the design of an active/passive remote sensing platform, 2) the design of a solid-state, dual-polarized, multi-frequency, Doppler radar system and performance characterization and 3) calibration approach for a ground based, multi-frequency, radar/radiometer system and first calibrated observations in this mode of operation.Item Open Access Networks and trust: systems for understanding and supporting internet security(Colorado State University. Libraries, 2022) Boots, Bryan Charles, author; Simske, Steve J., advisor; Abdunabi, Ramadan, committee member; Jayasumana, Anura, committee member; Vijayasarathy, Leo, committee memberThis dissertation takes a systems-level view of the multitude of existing trust management systems to make sense of when, where and how (or, in some cases, if) each is best utilized. Trust is a belief by one person that by transacting with another person (or organization) within a specific context, a positive outcome will result. Trust serves as a heuristic that enables us to simplify the dozens decisions we make each day about whom we will transact with. In today's hyperconnected world, in which for many people a bulk of their daily transactions related to business, entertainment, news, and even critical services like healthcare take place online, we tend to rely even more on heuristics like trust to help us simplify complex decisions. Thus, trust plays a critical role in online transactions. For this reason, over the past several decades researchers have developed a plethora of trust metrics and trust management systems for use in online systems. These systems have been most frequently applied to improve recommender systems and reputation systems. They have been designed for and applied to varied online systems including peer-to-peer (P2P) filesharing networks, e-commerce platforms, online social networks, messaging and communication networks, sensor networks, distributed computing networks, and others. However, comparatively little research has examined the effects on individuals, organizations or society of the presence or absence of trust in online sociotechnical systems. Using these existing trust metrics and trust management systems, we design a set of experiments to benchmark the performance of these existing systems, which rely heavily on network analysis methods. Drawing on the experiments' results, we propose a heuristic decision-making framework for selecting a trust management system for use in online systems. In this dissertation we also investigate several related but distinct aspects of trust in online sociotechnical systems. Using network/graph analysis methods, we examine how trust (or lack of trust) affects the performance of online networks in terms of security and quality of service. We explore the structure and behavior of online networks including Twitter, GitHub, and Reddit through the lens of trust. We find that higher levels of trust within a network are associated with more spread of misinformation (a form of cybersecurity threat, according to the US CISA) on Twitter. We also find that higher levels of trust in open source developer networks on GitHub are associated with more frequent incidences of cybersecurity vulnerabilities. Using our experimental and empirical findings previously described, we apply the Systems Engineering Process to design and prototype a trust management tool for use on Reddit, which we dub Coni the Trust Moderating Bot. Coni is, to the best of our knowledge, the first trust management tool designed specifically for use on the Reddit platform. Through our work with Coni, we develop and present a blueprint for constructing a Reddit trust tool which not only measures trust levels, but can use these trust levels to take actions on Reddit to improve the quality of submissions within the community (a subreddit).Item Open Access Outlier discordancy tests based on saddlepoint approximations(Colorado State University. Libraries, 2019) Sleeper, Andrew D., author; Scharf, Louis, advisor; Boes, Duane, committee member; Breidt, Jay, committee member; Jayasumana, Anura, committee memberWhen testing for the discordancy of a single observed value, a test based on large values of the maximum absolute studentized residual (MASR) or maximum squared studentized residual (MSSR) is known to be optimal, by maximizing the probability of correctly identifying an outlying value, while controlling the risk of a false identification to α. The exact distribution of MASR and MSSR is not known. In its place, the first Bonferroni bound on the distribution of these statistics is commonly used as an outlier test; see Grubbs (1950). We present new approximations to the distribution of MASR or MSSR, based on saddlepoint approximations of the density of statistics calculated from truncated normal random variables. These approximations are developed in three settings: a one-sample case, univariate regression, and multivariate regression. In comparisons with three versions of Bonferroni bounds and a Monte Carlo simulation, the saddlepoint approximations are shown to perform well in a wide range of situations, especially at larger sample size. The saddlepoint approximations also calculate faster than the improved versions of Bonferroni bounds.Item Open Access Perception architecture exploration for automotive cyber-physical systems(Colorado State University. Libraries, 2022) Dey, Joydeep, author; Pasricha, Sudeep, advisor; Jayasumana, Anura, committee member; Wyndom, Brett, committee memberIn emerging autonomous and semi-autonomous vehicles, accurate environmental perception by automotive cyber physical platforms are critical for achieving safety and driving performance goals. An efficient perception solution capable of high fidelity environment modeling can improve Advanced Driver Assistance System (ADAS) performance and reduce the number of lives lost to traffic accidents as a result of human driving errors. Enabling robust perception for vehicles with ADAS requires solving multiple complex problems related to the selection and placement of sensors, object detection, and sensor fusion. Current methods address these problems in isolation, which leads to inefficient solutions. For instance, there is an inherent accuracy versus latency trade-off between one stage and two stage object detectors which makes selecting an enhanced object detector from a diverse range of choices difficult. Further, even if a perception architecture was equipped with an ideal object detector performing high accuracy and low latency inference, the relative position and orientation of selected sensors (e.g., cameras, radars, lidars) determine whether static or dynamic targets are inside the field of view of each sensor or in the combined field of view of the sensor configuration. If the combined field of view is too small or contains redundant overlap between individual sensors, important events and obstacles can go undetected. Conversely, if the combined field of view is too large, the number of false positive detections will be high in real time and appropriate sensor fusion algorithms are required for filtering. Sensor fusion algorithms also enable tracking of non-ego vehicles in situations where traffic is highly dynamic or there are many obstacles on the road. Position and velocity estimation using sensor fusion algorithms have a lower margin for error when trajectories of other vehicles in traffic are in the vicinity of the ego vehicle, as incorrect measurement can cause accidents. Due to the various complex inter-dependencies between design decisions, constraints and optimization goals a framework capable of synthesizing perception solutions for automotive cyber physical platforms is not trivial. We present a novel perception architecture exploration framework for automotive cyber- physical platforms capable of global co-optimization of deep learning and sensing infrastructure. The framework is capable of exploring the synthesis of heterogeneous sensor configurations towards achieving vehicle autonomy goals. As our first contribution, we propose a novel optimization framework called VESPA that explores the design space of sensor placement locations and orientations to find the optimal sensor configuration for a vehicle. We demonstrate how our framework can obtain optimal sensor configurations for heterogeneous sensors deployed across two contemporary real vehicles. We then utilize VESPA to create a comprehensive perception architecture synthesis framework called PASTA. This framework enables robust perception for vehicles with ADAS requiring solutions to multiple complex problems related not only to the selection and placement of sensors but also object detection, and sensor fusion as well. Experimental results with the Audi-TT and BMW Minicooper vehicles show how PASTA can intelligently traverse the perception design space to find robust, vehicle-specific solutions.Item Open Access Phase coding and frequency diversity for weather radars(Colorado State University. Libraries, 2020) Kumar, Mohit, author; Chandrasekar, V., advisor; Cheney, Margaret, committee member; James, Susan, committee member; Jayasumana, Anura, committee memberThis thesis has developed three main ideas: 1) Polyphase coding to achieve orthogonality between successive pulses leading to second trip suppression abilities, 2) Frequency diversity on a pulse to pulse basis to achieve second trip suppression and retrieval capability in a weather radar, 3) a multiple input, multiple output (MIMO) configuration using the orthogonality features obtained using ideas in 1 and 2. It is shown in this thesis that this configuration for a radar leads to better spatial resolution by the formation of a bigger virtual array. It is also demonstrated that orthogonality is a big requirement to get this improvement from a MIMO configuration. This thesis addresses this issue with a new polyphase code pair and mismatched filter based framework which gives excellent orthogonal features compared to a matched filter processor. The MIMO platform is a long term goal (technologically) and therefore the polyphase codes were used to demonstrate second trip suppression abilities that uses orthogonal features of these codes to reduce range and velocity ambiguity. These are called as Intra-pulse phase coding techniques. The thesis also demonstrates another technique to achieve orthogonality between pulses by coding them on different frequencies. This is termed as Inter-pulse frequency diversity coding. In the beginning, design and implementation of Intra-pulse polyphase codes and algorithms to generate these codes with good correlation properties are discussed. Next, frequency diversity technique is introduced and compared with other inter-pulse techniques. Other Inter-pulse coding schemes like that based on Chu codes are widely used for second trip suppression or cross-polarization isolation. But here, a novel technique is discussed taking advantage of frequency diverse waveforms. The simulations and tests are accomplished on D3R weather radar system. A new method is described to recover velocity and spectral width due to incoherence in samples from change of frequency pulse to pulse. It is shown that this technique can recover the weather radar moments over a much higher dynamic range of the other trip contamination as compared with the popular systematic phase codes, for second trip suppression and retrieval. For these new features to be incorporated in the D3R radar, it went through upgrade of the IF sections and digital receivers. The NASA dual-frequency, dual-polarization, Doppler radar (D3R) is an important ground validation tool for the global precipitation measurement (GPM) mission's dual-frequency precipitation radar (DPR). It has undergone extensive field trials starting in 2011 and continues to provide observations that enhance our scientific knowledge. This upgrade would enable more research frontiers to be explored with enhanced performance. In the thesis, this upgrade work is also discussed.Item Open Access RELAX: cross-layer resource management for reliable NoC-based 2D and 3D manycore architectures in the dark silicon era(Colorado State University. Libraries, 2019) Raparti, Venkata Yaswanth, author; Pasricha, Sudeep, advisor; Jayasumana, Anura, committee member; Bohm, Willem, committee member; Kim, Ryan, committee memberEmerging 2D and 3D chip-multiprocessors (CMPs) are facing numerous challenges due to technology scaling that impact their reliability, power dissipation, performance, and security. With growing parallelism in applications and the increasing core counts, traditional resource management frameworks and critical on-chip components such as networks-on-chip (NoC) and memory controllers (MCs) do not scale well to efficiently cope with this new and complex design space of CMP design. Several phenomena are affecting the reliability of CMPs. For instance, device-level phenomena such as (Bias Temperature Instability) BTI and (Electro Migration) EM lead to permanent faults due to aging in CMOS logic and memory cells in computing cores and NoC routers of CMPs. Simultaneously, alpha particle strikes (soft errors) and power supply noise (PSN) impacts lead to transient faults across CMP components. There have been several attempts to address these challenges at the circuit and micro-architectural levels, such as guard-banding and over-provisioning of resources to the CMP. However, with increasing complexity in the architecture of today's CMPs, mechanisms to overcome these challenges at the circuit and microarchitectural levels alone, incur large overheads in power and performance. Hence, there is a need for a system-level solution that utilizes control knobs from different layers and manages the CMP reliability in runtime to efficiently minimize the adverse effects of these failure mechanisms while meeting performance and power constraints. Network-on-chip (NoC) has become the defacto communication fabric in CMP architectures. There are different types of NoC topologies and architectures that are tailored for different CMP platforms based on their communication demands. The most used topology is 2D/3D mesh-based NoC with a deadlock-free turn-model based routing scheme as it has demonstrated to be scaling well with the increasing core count. However, with unprecedented reliability and security challenges in CMP designed at the sub-nanometer technology node, the basic turn-model routing is proved to be inefficient to provide seamless communication between cores and other on-chip components. This demands for a more reliable NoC solution in 2D, and 3D CMPs. Another critical criterion while designing a CMP is NoC throughput and power consumption in CMPs with integrated manycore accelerators. Manycore accelerator platforms operate on thousands of threads with hundreds of thread blocks executing several kernels simultaneously. The core-to-memory data generated in accelerators is very high compared to a traditional CPU processor. This leads to congestion at memory controllers that demands a high bandwidth NoC with high power and area overheads, which is not scalable as a number of cores in the accelerator increases. High volumes of read reply data in manycore accelerator platforms necessitate intelligent memory scheduling along with low latency NoC to resolve the memory bottleneck issue. Mechanisms to overcome these challenges require complex architectures across CMP interconnection fabric that are designed and integrated at various global locations. Unfortunately, such global fabrication of CMP processors makes them vulnerable to security threats due to hardware Trojans that may be inserted in third-party (3PIP) NoCs. We address these issues by designing a cross-layer resource management framework called RELAX that enhances performance and security of NoC-based 2D and 3D CMPs, while meeting a diverse set of platform constraints related to the lifetime of the CMP, dark silicon power, fault tolerance, thermal and real-time application performance. At the OS-level, we have developed several techniques such as lifetime aware application mapping heuristic, adaptive application degree of parallelism (DoP), slack aware checkpointing, and aging aware NoC path allocation. At the system level, we propose dynamic voltage scheduling (DVS), and a low power checkpointing mechanism to meet the dark silicon power and application deadline constraints. At the architectural level, we introduce several novel upgrades to the architectures of NoC routers, memory controllers (MCs), and network interfaces (NIs) to improve the performance of NoC-based CMPs while minimizing the power dissipation and mitigating security threats from hardware Trojans.Item Open Access Reliable, energy-efficient, and secure silicon photonic network-on-chip design for manycore architectures(Colorado State University. Libraries, 2018) Chittamuru, Sai Vineel Reddy, author; Pasricha, Sudeep, advisor; Jayasumana, Anura, committee member; Roy, Sourajeet, committee member; Malaiya, Yashwant K., committee memberAdvances in technology scaling over the past s+H91everal decades have enabled the integration of billions of transistors on a single die. Such a massive number of transistors has allowed multiple processing cores and significant memory to be integrated on a chip, to meet the rapidly growing performance demands of modern applications. These on-chip processing and memory components require an efficient mechanism to communicate with each other. Thus emerging manycore architectures with high core counts have adopted scalable packet switched electrical network-on-chip (ENoC) fabrics to support on-chip transfers. But with several hundreds to thousands of on-chip cores expected to become a reality in the near future, ENoCs are projected to suffer from cripplingly high power dissipation and limited performance. Recent developments in the area of silicon photonics have enabled the integration of on-chip photonic interconnects with CMOS circuits, enabling photonic networks-on-chip (PNoCs) that can offer ultra-high bandwidth, reduced power dissipation, and lower latency than ENoCs. There are several challenges that hinder the commercial adoption of these PNoC architectures. Especially, the operation of silicon photonic components is very sensitive to thermal variations (TV) and process variations (PV) that frequently occur on a chip. These variations and their mitigation techniques create significant reliability issues and increase energy costs in PNoCs. Furthermore, photonic components are susceptible to intrinsic crosstalk noise and aging, which demands higher energy for reliable communication. Moreover, contention in photonic waveguides as well as laser power distribution overheads also reduce performance and energy-efficiency. In addition, hardware trojans (HTs) in the electrical circuitry of photonic components lead to covert data snooping from shared photonic waveguides and introduces serious hardware security threats. To address these challenges, in this dissertation we propose a cross-layer framework towards the design of reliable, secure, and energy-efficient PNoC architectures. We devise layer-specific solutions for PNoC design as part of our framework: (i) we propose device-level enhancements to adapt to TV, and to mitigate heterodyne crosstalk and intermodulation effect induced heterodyne crosstalk; we also analyze aging in photonic components and explore its impact on PNoCs; (ii) at the circuit-level we propose PV-aware homodyne and heterodyne crosstalk mitigation mechanisms, a PV-aware security enhancement mechanism, and TV- and PV-aware photonic component assignment mechanisms; (iii) at the architecture-level we propose new application specific and reconfigurable PNoC architectures to improve photonic channel utilization, a laser power management scheme across components of PNoC architectures, and a reservation-assisted security enhancement scheme to improve security in PNoC architectures; and (iv) at the system-level we propose TV and PV aware thread migration schemes and application scheduling schemes that exploit adaptive application degree of parallelism (DoP). In addition to layer-specific enhancements, we also combine techniques across layers to create cross-layer optimization strategies to aggressively improve reliability and energy-efficiency in PNoC architectures. In our SPECTRA and LIBRA frameworks we combine system-level and circuit-level enhancements for TV management in PNoCs. In our 'Island of Heater' framework we combine system-level and device-level enhancements for TV management in PNoCs. We combine device-level and circuit-level enhancements for heterodyne crosstalk mitigation in our PICO and HYDRA frameworks. Our proposed BiGNoC architecture uses architectural-level enhancements and system-level application scheduling to improve its performance and energy-efficiency. Lastly, in our SOTERIA framework we combine circuit-level and architecture-level enhancements to enable secure communication in DWDM-based PNoC architectures.Item Open Access Towards fair and efficient distributed intelligence(Colorado State University. Libraries, 2024) Gorbett, Matt, author; Ray, Indrakshi, advisor; Shirazi, Hossein, committee member; Simske, Steve, committee member; Jayasumana, Anura, committee memberArtificial Intelligence is rapidly advancing the modern technological landscape. Alongside this progress, the ubiquitous presence of computational devices has created unique opportunities to deploy intelligent systems in novel environments. For instance, resource constrained machines such as IoT devices have the potential to enhance our world through the use of Deep Neural Networks (DNNs). However, modern DNNs suffer from high computational complexity and are often relegated to specialized hardware, a bottleneck which has severely limited their practical use. In this work, we contribute to improving these issues through the use of neural network compression. We present new findings for both model quantization and pruning, two standard techniques for creating compressed and efficient DNNs. To begin, we examine the efficacy of neural network compression for time series learning, an unstudied modality in model compression literature. We construct a generalized Transformer architecture for multivariate time series which applies both binarization and pruning to model parameters. Our results show that the lightweight models achieve comparable accuracy to dense Transformers of the same structure on time series forecasting, classification, and anomaly detection tasks while significantly reducing the computational burden. Next, we propose two novel algorithms for neural network compression: 1) Tiled Bit Networks (TBNs) and 2) Iterative Weight Recycling (IWR). TBNs present a new form of quantization to tile neural network layers with sequences of bits to achieve sub-bit compression of binary-weighted models. The method learns binary vectors (i.e. tiles) to populate each layer of a model via tensor aggregation and reshaping operations; during inference, TBNs use just a single tile per model layer. TBNs perform well across a diverse range of architecture (CNNs, MLPs, Transformers) and tasks (classification, segmentation) while achieving up to 8x reduction in size compared to binary-weighted models. The second algorithm, IWR, generates sparse neural networks from randomly initialized models by identifying important parameters within neural networks for reuse. The approach enables us to prune 80% of ResNet50's parameters while still achieving 70.8% accuracy on ImageNet. Finally, we examine the feasibility of deploying compressed DNNs in practical applications. Specifically, we deploy Sparse Binary Neural Networks (SBNNs), TBNs, and other common compression algorithms on an embedded device for performance assessment, finding a reduction in both peak memory and storage size. By integrating algorithmic and theoretical advancements into a comprehensive end-to-end methodology, this dissertation contributes a new framework for crafting powerful and efficient deep learning models applicable in real-world settings.